Google’s next-generation Tensor chipsets, the G5 and G6, are set to make significant strides in performance and efficiency. Departing from the previous Exynos-based design, these SoCs will be manufactured by TSMC using cutting-edge 3nm processes.
Tensor G5: A Powerful Performer
The Tensor G5, codenamed “laguna,” is slated to power the upcoming Pixel 10 series. It will be built on TSMC’s 3nm-class N3E process, a technology also used in Apple’s A18 Pro chip. This advanced node ensures exceptional performance and energy efficiency.
The G5 boasts an upgraded CPU cluster featuring a powerful Cortex-X4 prime core, multiple Cortex-A725 performance cores, and energy-efficient Cortex-A520 efficiency units. Additionally, the GPU receives a substantial boost with a dual-core Imagination Technologies DXT-48-1536 unit clocked at 1.1 GHz.
One of the standout features of the G5 is its support for ray tracing, a graphics technique that enhances realism in games and other applications. Furthermore, the SoC offers GPU virtualization, enabling accelerated graphics in virtual machines.
The G5’s new NPU is expected to deliver a 14% improvement in AI tasks, demonstrating Google’s commitment to AI-driven features in its Pixel devices.
Tensor G6: Building on the G5’s Success
The Tensor G6, codenamed “malibu,” is anticipated to be manufactured using TSMC’s upcoming N3P process. While still a 3nm process, N3P offers further enhancements in performance, power efficiency, and size. According to leaked information, N3P can achieve a 5% increase in frequency compared to N3E while reducing power consumption by 7% and area by 4%.
Google’s Tensor G5 and G6 represent a significant leap forward in mobile chip technology. With their advanced manufacturing processes, powerful CPU and GPU clusters, and enhanced AI capabilities, these SoCs are poised to deliver exceptional performance and efficiency in the Pixel lineup and beyond.
